Alif Semiconductor /AE512F80F5582AS_CM55_HE_View /ADC120 /ADC_CONTROL

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Interpret as ADC_CONTROL

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (START)START 0 (ACTIVE)ACTIVE 0 (Val_0x0)INT_CTRL

INT_CTRL=Val_0x0

Description

ADC Single-shot Conversion Start and Comparator Threshold Mode Register

Fields

START

Write 1: Starts the ADC process. This is one-time start control. If the number of programmed samples is reached, processing stops, unless another event causes it to continue. For START bit to be operational the ADC_START_SRC[ENA] must be 1.

ACTIVE

If 1, indicates ADC is processing data.

INT_CTRL

This field specifies the threshold windows for CMPA and CMPB interrupt generation.

0 (Val_0x0): CMPA = Above threshold A value; CMPB = Above threshold B value.

1 (Val_0x1): CMPA = Below threshold A value; CMPB = Below threshold B value.

2 (Val_0x2): CMPA = Between threshold A and B values; CMPB = Outside threshold A and B values.

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